Chia-Hsiang YangProfessor

Professor Chia-Hsiang Yang is a faculty member in the Department of Electrical Engineering and the Graduate Institute of Electronics Engineering at National Taiwan University. His academic expertise includes AI chip design, biomedical IC signal processing, and communication baseband circuit design. Recently, he has focused on research into integrated circuits and chips for accelerating AI computation and inference, with results published in leading international journals. Due to his significant academic contributions, Professor Yang has served as an editor for high-impact international journals and chaired multiple international academic conferences. He continues to drive advancements in semiconductor and artificial intelligence technologies.

  • Publications 
        1. T.-W. Tong, T.-J. Chen, Y.-Y. Hsieh, and C.-H. Yang, “A 73.8K inference/mJ SVM Learning Accelerator for Brain Pattern Recognition,” IEEE J. Solid- State Circuits (JSSC) A-SSCC Special Issue, vol. 59, no. 10, pp. 3357-3365, Oct. 2024.
        2. P.-S. Chen, Y.-L. Chen, Y.-C. Lee, Z.-S. Fu, C.-H. Yang, “A 28.8mW Accelerator IC for Dark Channel Prior Based Blind Image Deblurring,” IEEE J. Solid-State Circuits (JSSC), vol. 59, no. 6, pp. 1899-1911, June 2024
        3. S.-J. Yu, Y.-C. Lee, L.-H. Lin, and C.-H. Yang, “An Energy-efficient Double Ratchet Cryptographic Processor with Backward Secrecy for IoT Devices,” IEEE J. Solid-State Circuits (JSSC), vol. 58, no. 6, pp. 1810-1819, June 2023.
        4. H.-Y. Shen, Y.-C. Lee, Z.-W. Tong, and C.-H. Yang, “A 40-nm 91-mW, 90-fps Learning-Based Full HD Super-Resolution Accelerator,” IEEE J. Solid-State Circuits (JSSC), vol. 58, no. 2, pp. 520-529, Feb. 2023.
        5. Y.-Y. Hsieh, Y.-C. Lin, and C.-H. Yang, “A 96.-2nJ/class Neural Signal Processor with Adaptable Intelligence for Seizure Prediction,” IEEE J. Solid-State Circuits (JSSC), vol. 58, no. 1, pp. 167-176, Jan. 2023.
        6. Y.-C. Chu, Y.-C. Lin, Y.-C. Lo, C.-H. Yang, “Fully Integrated Annealing Processor for Large-Scale Autonomous Navigation Optimization,” Int. Solid-State Circuits Conference (ISSCC), pp. 46-47, Feb. 2024.
        7. T. Lee, T.-Y. Chen, I-H. Liu, and C.-H. Yang, “A 131mW 6.4Gbps 256×32 Multi-User MIMO OTFS Detector for Next-Gen Communication Systems,” Int. Solid-State Circuits Conference (ISSCC), pp. 488-489, Feb. 2024
        8. Y.-L. Chen, C.-H. Yang, Y.-C. Wu, C.-H. Lee, W.-C. Chen, L.-Y. Lin, N.-S. Chang, C.-P. Lin, C.-S. Chen, J.-H. Hung, C.-H. Yang, “A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing,” Int. Solid-State Circuits Conf. (ISSCC), pp. 44-45, Feb. 2023.
        9. I-T. Lin, Z.-S. Fu, W.-C. Chen, L.-Y. Lin, N.-S. Chang, C.-P. Lin, C.-S. Chen, C.-H. Yang, “A 28nm 142mW Motion-Control SoC for Autonomous Mobile Robots,” Int. Solid-State Circuits Conf. (ISSCC), pp. 46-47, Feb. 2023.
        10. C.-Y. Du, C.-F. Tsai, W.-C. Chen, L.-Y. Lin, N.-S. Chang, C.-P. Lin, C.-S. Chen, C.-H. Yang, “A 28nm 11.2TOPS/W Hardware-Utilization-Aware Neural-Network Accelerator with Dynamic Dataflow,” Int. Solid-State Circuits Conf. (ISSCC), pp. 332-333, Feb. 2023.
        11. Ying-Yueh Chu, Yu-Chen S. H. Yang, Shih-Yuan Hsu, Hsien-Yu Fan, YangChing Chen (2022, Dec). Effect of Sorbitol Intake through Prenatal to Adolescence on Gut Microbiome and Body Composition. The 22nd Annual Congress of Taiwan Medical Association for the Study of Obesity, 台灣台北. NSTC:109-2314-B-038-057.
        12. 朱瑩悅、蔡詩筠、王品翰、蔡佳峻、李佳峻、劉秉逸、陳珮蓉、郭雅婷、簡國龍、范掀裕(2024年05月)。以牛奶體積建立評估食物份量的神經網路深度學習模 型。第五十屆台灣營養學會年會暨學術研討會,台灣台北。
        13. 陳宗佑, 朱瑩悅, 黃慈雯, 洪靖嵐(2022年05月)。大學生未精製全穀類米香攝取及影響因素之研究。第48屆台灣營養學會年會,台灣嘉義。
        14. 朱瑩悅, 陳昱君(2021年05月)。大學生實行均衡飲食障礙的質性研究。第47 屆台灣營養學會年會,台灣台北。
        15. 胡慈恩, 李謙, 朱瑩悅(2021年05月)。大學生對未精製全穀類米香的接受度 研究。第47屆台灣營養學會年會,台灣台北。
        16. 朱瑩悅、陳宗佑、李謙、胡慈恩(2020年05月)。大臺北地區大學生為精製全 穀食物現況及其影響因素之研究。第46屆台灣營養學會年會,台北 線上。
        17. 朱瑩悅,陳宗佑,羅俐婷,張雅筑,陳芓妘(2019年05月)。環境影響大台 北地區大學生全榖類食物的知識與攝取態度。第54屆營養年會暨學術研討會 從政策到實務,臺灣臺北。

        朱瑩悅、劉瑋庭、杜欣恬、陳蓉樺(2018年05月)。大台北地區大學生全穀類 的知識、態度與飲食行為之研究。2018生活應用科學學術研討會,臺灣臺北。